ODES: 1st Workshop on Optimizations
for DSP and Embedded Systems
March 23, 2003
Hyatt at Fisherman's Wharf,
San Francisco, California
in conjunction with International Symposium on Code Generation and
Optimization (CGO)
http://www.cgo.org
PROGRAM
9:00 AM
Introduction
9:05 AM
Session 1: Compilers/Frameworks
-
SPIRAL: An Overview
Jose M. F. Moura and Markus Puschel (Carnegie
Mellon University)
-
Profile-guided Optimization in the Crosscore Production
C/C++ DSP Compilers
Michael Perkins, Graeme Roy, and Andrew Higham
(Analog Devices Inc.)
-
Building a Retargetable C Compiler for Embedded
Processors
Philip Sweany (Texas Instruments Inc.) and Steve
Carr (Michigan Technological University)
-
An Access Regularity Criterion and Regularity
Improvement Heuristics for Data Transfer Optimization by Global Loop Transformations
Sven Verdoolaege, Koen Danckaert, Francky Catthoor,
Maurice Bruynooghe, Gerda Janssens (K.U.Leuven, IMEC, Belgium)
10:45 AM
Break
11:00 AM
Keynote
12:00 PM
Lunch (on your own)
1:30 PM
Session 2: Optimizations for Power
-
Software Transformations to Reduce Instruction
Memory Power Consumption using a Loop Buffer
Tom Vander Aa, Murali Jayapala, Francisco Barat,
Geert Deconinck (ESAT, K.U.Leuven, Belgium), Henk Corporaal, and Francky
Catthoor (IMEC, Leuven, Belgium)
-
Compiler-Controlled Dynamic Voltage Scaling (DVS)
for DSP Applications
Yuvraj Singh Dhillon and Abhijit Chatterjee (Georgia
Tech)
-
The Use of a Reconfigurable Computing Cache in
a Digital Signal Processor: Power and Performance
Kathryn Fountain Gossett and Akhilesh Tyagi (Iowa
State University)
2:55 PM
Break
3:30 PM
Session 3: Optimizations for Performance
-
Configurable Enhanced DMA architecture for High
Performance DSP
Shoban Jagathesan, Sanjive Agarwala, Quang An,
Raguram Damodaran, Abhijeet Chachad, Hung Ong, and Kyle Castille (Texas
Instruments Inc.)
-
A Microengine-Based Chip-Multiprocessor (µCMP)
Architecture for Compute Intensive Applications
Kenta Nakamura, Muneyuki Harada, Yoji Kuwayama,
and Kazuaki Murakami (Kyushu University, Japan)
-
Efficient Radar Processing Via Array and Index
Algebras
Lenore R. Mullin, Daniel J. Rosenkrantz, Harry
B. Hunt III, and Xingmin Luo (University at Albany, SUNY)
Program Co-chairs
| Deepu Talla |
Texas Instruments |
| Lizy John |
University of Texas at Austin |
Program Committee
| Shuvra Bhattacharyya |
University of Maryland |
| Steve Carr |
Michigan Technological University |
| Pradeep Dubey |
Broadcom |
| Jose Fridman |
Analog Devices |
| Jason Fritts |
Washington University in St. Louis |
| Tor Jeremiassen |
Texas Instruments |
| Lizy John |
University of Texas at Austin |
| Eugene John |
University of Texas at San Antonio |
| Vinod Kathail |
Hewlett Packard |
| Rainer Leupers |
Aachen University of Technology |
| Vijay Madisetti |
Georgia Tech |
| John Reekie |
University of California at Berkeley |
| Deepu Talla |
Texas Instruments |