ODES-2: 2nd Workshop on Optimizations
for DSP and Embedded Systems
March 21, 2004
The Sheraton Hotel and Conference Center,
Palo Alto, California
in conjunction with International Symposium on Code Generation and
Optimization (CGO)
http://www.cgo.org
PROGRAM
8:30 AM
Introduction
8:35 AM
Session 1: Frameworks/Compilers
-
FITS: Increasing Code Density for Embedded Systems with a Cost-Effective 16-bit Synthesis Technique
Allen Cheng (University of Michigan), Gary Tyson (Florida State University), and Trevor Mudge (University
of Michigan)
-
Framework and Design Methodology of a Compiler that Compresses Code using
Echo Instructions
Philip Brisk and Majid Sarrafzadeh
(University of California, Los Angeles)
-
Hiearchical Rewriting and Hiding of Conditions to enable GLT
Martin Palkovic, Erik Brockmeyer, Henk Corporaal, Francky Cathoor, and Johan
Vounckx (IMEC Laboratory, Leuven, Belgium)
-
A Binary Rewriting Tool for DSPs to Optimize Programs Based on Profile
Information
Ramesh V Peri, Zino Benaissa, and Sri Doddapaneni (Intel Corporation)
10:35 AM
Break
11:00 AM
Keynote
-
The Power Management Challenge: Designing across the General-Purpose/Embedded System Boundaries
Partha Ranganathan (HP Labs)
12:00 PM
Lunch
1:30 PM
Session 2: Optimizations for Energy/Performance
-
SIMD 16-bit FP instructions for Image and Media Processing on General Purpose
Microprocessors
Daniel Etiemble and Lionel Lacassagne (University Paris Sud, France)
-
Instruction and Data Memory Energy Trade-off using a High Level Model
Tom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck (ESAT, K.U.
Leuven, Beligum), Francky Catthoor (IMEC, Leuven, Belgium), and Henk Corporaal
(TU/Eindhoven)
-
Improving Energy Efficiency in Sensor Networks by Raising Communication
Throughput using Software Thread Integration
Ramnath Venugopalan and Alexander G. Dean (North
Carolina State University)
3:00 PM
Break
3:30 PM
Session 3: Analytical Approaches
-
Optimizing Algorithms for Translating Image Processing Hardware Designs into
Configurable Hardware Resources
Thomas Drayer and Joseph G. Tront (Virginia Tech)
-
Algebraic Techniques for Optimizing Polynomial Expressions
Anup Hosangadi, Ryan Kastner (University of California, Santa Barbara), and
Farzan Fallah (Fujitsu Labs of America)
-
Analytical Computation of Ehrhart Polynomials and its Applications for
Embedded Systems
Sven Verdoolaege, Kristof Beyis, Maurice Bruynooghe, Rachid Seghir, and
Vincent Loechner (K.U. Leuven, University of Ghent, and ICPS/LSIIT, Universite
Louis Pasteur, Strasbourg)
Program Co-chairs
| Deepu Talla |
Texas Instruments |
| Lizy John |
University of Texas at Austin |
Program Committee
| Shuvra Bhattacharyya |
University of Maryland |
| Steve Carr |
Michigan Technological University |
| Henk Corporaal |
Technical University Eindhoven |
| Pradeep Dubey |
Intel |
| Jose Fridman |
Analog Devices |
| Jason Fritts |
Washington University in St. Louis |
| Tor Jeremiassen |
Texas Instruments |
| Lizy John |
University of Texas at Austin |
| Eugene John |
University of Texas at San Antonio |
| Trevor Mudge |
University of Michigan |
| John Reekie |
University of Technology Sydney |
| Deepu Talla |
Texas Instruments |
| Kees Vissers |
University of California Berkeley |